Overview
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In this role you will contribute to digital design efforts for cutting-edge semiconductor technology. You will work on advanced technology nodes and take ownership of RISC-V designs, CPU architecture components, PCIe protocols, and machine learning accelerators. You will operate within UVM-enabled environments to deliver high-quality IP and SOC blocks. This position offers sponsorship/relocation options for the right candidate and a pathway to influence next-generation digital ICs.
Compensaciones / Incentivos
visa sponsorship and relocation support
Responsabilidades
Contribute to digital IC/ASIC/FPGA designs for advanced technology nodes
Develop or integrate RISC-V designs and CPU architecture components
Work on PCIe protocols and related interfaces




Leverage UVM environments for verification and validation
Collaborate on IP/SOC design across cross-functional teams
Contribute to scalable digital design methodologies and architecture decisions
Requisitos principales
5+ years of ASIC/FPGA design experience
SystemVerilog for IP/SOC design
Experience xqbhyrx with UVM environments and processes
Strong scripting skills (C/C++, Python)
Knowledge of RISC-V/CPU/GPU is a plus
PCIe knowledge is a plus
Visa sponsorship and relocation support available depending on experience/qualifications
Degree in Electronics / Microelectronics or similar field
SystemVerilog
UVM
ASIC/FPGA design
RISC-V
PCIe
C/C++

📌 Digital ASIC Design Engineer (Barcelona)
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📍 Barcelona