Overview
Por favor, asegúrese de leer completamente el resumen y los requisitos de esta oportunidad de empleo que se detallan a continuación.
In this role you will deliver digital subsystems and high-precision analog blocks for next‑gen consumer products. You’ll work within a cross‑functional CSS team focused on capacitive sensing and optical sensing, shaping devices used in portable electronics. You’ll apply state‑of‑the‑art physical design methods to enable scalable, tape‑out ready designs and collaborate across geographies to meet schedule milestones. This is a growth‑oriented position at a general leader driving intelligent edge solutions.
Responsabilidades
Floorplan development including power/ground and clock distribution
Logic synthesis, cell placement, and interconnect routing
Equivalence-checking, timing closure, and physical verification (LVS, DRC)
Collaborate with RTL designers to resolve challenging problems
Own and deliver digital subsystems of significant size and complexity
Develop schedules and monitor progress




Coordinate effective teamwork across geographically dispersed locations
Requisitos principales
B. xqbhyrx Tech/M.Tech in EE/ECE with 10+ years of digital implementation experience
Strong knowledge of floor planning, place and route, CTS, STA, ECO methodology, power analysis, and physical design verification
Broad experience in synthesis and timing constraints
Experience with 40nm digital implementation
Scripting skills in Tcl, SKILL, and Perl
Cadence tool experience preferred
Experience with Perforce/Methodics for versioning
Knowledge of CPF/UPF methodology (advantage)
Cadence Virtuoso knowledge (advantage)
Tape-out ready GDS2 database experience (advantage)
Technical ownership and hands-on implementation capability
Strong interpersonal, teamwork and communication skills
teamwork
communication
ownership
digital implementation
floorplanning
place and route

📌 Staff Engineer, Physical Design (Valencia)
🏢 Analog Devices
📍 Valencia