23 ago
|
Vivid Resourcing
|
Barcelona
23 ago
Vivid Resourcing
Barcelona
Vivid Resourcing seeks a senior freelance FPGA Development Engineer in Barcelona to design and implement SystemVerilog FPGA functionality for synchronization and instrumentation platforms. This hands‑on role focuses on multi‑FPGA systems rather than ASIC design, working with a global R&D; team.
Inscríbase ágil, consulte la descripción completa desplazándose hacia abajo para conocer todos los requisitos de este puesto.
The right candidate has deep FPGA experience, strong Verilog/SystemVerilog design skills, and a solid grasp of CDC, timing, and verification. xqbhyrx
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Hay opciones de teletrabajo/trabajo desde casa disponibles para este puesto.
📌 Senior FPGA Engineer (SystemVerilog) – Barcelona Hybrid
🏢 Vivid Resourcing
📍 Barcelona