18 ago
|
Openchip And Software Technologies
|
Barcelona
18 ago
Openchip And Software Technologies
Barcelona
The SoC Architecture team is responsible for defining high-performance and power efficient System-on-Chip hardware architecture.
No espere a enviar su solicitud después de leer esta descripción; se espera un gran volumen de candidaturas para esta oportunidad.
The team identifies Hardware Requirements, defines the overall SoC system and delivers High-level Architecture Specification (HAS) integrating multiple processing units, memory, interconnects, accelerators, interfaces and peripherals to achieve optimal Power, Performance, Area and Cost (PPAC) efficiency. The team is also responsible for overall aspects of security, debug, production test and device packaging and for defining and maintaining Configuration Management processes for scalable and configurable architectures.
The team works closely with Product, Technology, Software and AI, and Hardware Engineering Teams for Design Implementation and Verification.
The Role:
The adecuado candidate should have strong knowledge of hardware architectures, VLSI design,
and successful industry experience with deployment of IPs in large SoC while working in a collaborative environment. This is a Hardware Architecture role that emphasizes a strong focus on defining and integrating Reliability, Availability and Serviceability (RAS) requirements and features for a resilient Hardware Architecture.
This role requires proactive collaboration with security experts and teams involved in Hardware Implementation, Software, System, and Product security. You will be responsible for all aspects of Hardware Security, throughout the Concept, Definition, and Specification of Hardware Architecture.
Key responsibilities:
- Architect and define overall SoC including processing units, hardware accelerators, memory, interconnect, interfaces and analog components.
- Work hand in hand with the product architects making sure hardware architecture meets the product goals.
- Define RAS strategies, support the architecture of RAS features and the
📌 RAS Hardware Architect (Barcelona)
🏢 Openchip And Software Technologies
📍 Barcelona