13 ago
|
Analog Devices
|
Valencia
13 ago
Analog Devices
Valencia
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a general semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
Senior Digital Design Engineer
Responsibilities
This position will involve many of the following tasks.
FPGA prototyping of design
Development of models & self checking mechanisms for FPGA
HW & S/W Codesign
Architectural design and specification of blocks.
Verilog/SystemVerilog RTL design
Interaction with customer and stakeholders
Design to meet timing, area, low-power, DFT, manufacturing test and timing targets for market
All aspects of design work including interaction with verification and analog team.
Interaction with implementation team to convert RTL to silicon. Defining timing constraints and performing static timing analysis
Working with architecture and design teams to determine functionality protocols
Qualifications
Bachelor's or Master's degree, in Engineering (Electronic Engineering) or equivalent
Architectural design and specification of complex systems, especially in system on chip with processors.
Deep knowledge of FPGA development flow
FPGA modelling
Verilog/SystemVerilog RTL design - with emphasis on AHB, AXI protocols and processor architecture on ARM cores.
Design to meet timing, area, low-power, manufacturing test and timing targets for market.
All aspects of design work including interaction with verification and analog team.
Interaction with implementation team to convert RTL to silicon.
Working with architecture and design teams to determine functionality protocols
📌 Senior Engineer, Digital Design Engineering (Valencia)
🏢 Analog Devices
📍 Valencia