A leading tech company in Spain is seeking an experienced Senior Verification Engineer with over 8 years in digital design verification. The idóneo candidate will possess strong expertise in SystemVerilog and UVM, and hands-on experience with advanced verification methodologies. You will work closely with design teams to ensure the correctness of complex microprocessor architectures. Excellent problem-solving skills and teamwork are essential attributes for success in this role.
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📌 Senior Verification Engineer: SystemVerilog/UVM for RTL - Barcelona, Cataluña, Spain
🏢 Talent
📍 Barcelona
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