Job Description Our client is expanding their Physical
Design organization and is looking for an experienced Physical
Design Lead to drive physical implementation of complex SoC or SiP
programs. In this role, you will take ownership of the physical
implementation flow, from floorplanning and implementation through
tape out, production and post silicon validation support. You will
work closely with IP providers, EDA vendors, silicon partners,
package partners and internal design teams to ensure high
performance and reliable chip delivery at advanced technology
nodes. Location : Barcelona, Spain - Hybrid Responsibilities: As a
Physical Design Lead, your broad responsibilities will include but
are not limited to: Lead the physical implementation process of
complex SoCs using advanced technology nodes Drive coordination
between chip design, package design and PCB teams Collaborate with
external IP providers, EDA vendors and silicon or package vendors
Ensure compliance with product goals, timelines and quality targets
through structured planning and reporting Provide technical
guidance on physical design flows, design for test and EDA methods
Moderate design reviews and technical discussions to support
decision making Support reliability, yield optimization and
production readiness Perform hands on technical tasks when required
to support the team Requirements: Physical Design Lead Master or
PhD in Computer Science, Microelectronics, Physics or related field
Proven experience with multiple tape outs of high performance SoCs
or SiPs for mass production Strong background in advanced physical




implementation flows and high speed digital design Demonstrated
experience managing complex SoC or SiP programs as a functional
lead Experience working with external IP, EDA and silicon or
package vendors Strong understanding of reliability and yield
optimization Excellent presentation, coordination and conflict
management skills English level C1 Nice to have Experience with
multi chiplet design Exposure to advanced packaging technologies
Background in post silicon validation and production ramp up
Preferred / Valued knowledge: Experience working with RISC V
architecture is highly valued, especially within processor, SoC,
RTL, verification, firmware, software, PCIe, DDR, PCS, DFT,
Physical Design or hardware environments. What’s in it for you? Our
client offers an exciting, challenging role in a collaborative,
dynamic environment. The right person will find many career growth
opportunities in their company, whether you want to advance your
technical skills or aspire to leadership in the future. Benefits:
Versátil working hours (office open between 7 AM and 9 PM,
employees manage their own schedule) Hybrid working model One week
per year work from anywhere 25 days annual leave plus December 24
and 31 €150 per month food allowance (≈ €1800 per year additional
compensation) Private medical insurance One time relocation bonus
paid with the first salary Support with housing search through an
agency Visa support if required Relocation support for family
Virtual shares Language classes (Spanish, English, Catalan) Tax
incentive

📌 Physical Design (Lead) (Cataluña)
🏢 Hireroo
📍 Cataluña