ph3About Analog Devices /h3 pAnalog Devices, Inc. (NASDAQ: ADI ) is a general semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on LinkedIn and Twitter (X). /p h3Job Description: /h3 pThe charter of ADI’s CSS team is to lead the market in selected technology domains with highly differentiated sensing and signal processing solutions. Today these technology areas include Capacitive Sensing, Optical Image Stabilization, Power management and Audio that drive growth in our portable and non-portable consumer business. As part of our global operation and expanding business needs, we are now seeking to fill key roles in defining, developing and implementing verification solutions for mixed signal ICs in this key market area. This would span the entire development cycle from concept phase, through verification planning, implementation, execution, and release of products to customers. The Design Verification Engineer will collaborate with the wider ADI technical community which affords an opportunity to work with many business units in ADI with exposure to many technologies and products. /p h3Responsibilities /h3 pBased in United Kingdom (Newbury, Edinburgh) Or Valencia Spain, this position will be responsible for contributing to: /p ul liVerification of complex designs and sub-systems using leading edge verification methodologies /li liContribute to and Influence the decisions on methodologies/strategies to be adopted for design verification.



/li liDevelop testbench architectures and develop using UVM or Formal based verification approaches. /li liDefine verification-plans, functional coverage, tests and verification methodology for block/chip-level verification. Work with the design team in generating verification-plans and closure metrics. /li liDebugging of Gate Level Simulation (GLS), waiving Timing Violations approved by designer /li liContinuous interaction with analog co-sim and firmware team. /li liTechnically mentor and guide junior verification engineers on SoC Verification. /li liSupport post-silicon verification activities of the products working with design, product evaluation and applications engineering team /li liLead verification efforts at IP or SoC level, effort estimation, project scheduling and tracking, task assignment, reporting to management or customer. /li /ul h3Qualifications /h3 ul liBachelor's or master’s degree, in Engineering (Electronic Engineering) or equivalent /li liBuilding and leading small verification teams. Strong interpersonal, teamwork and communication skills are essential. Be self-motivated and enthusiastic. Strong level of English speaking and writing. /li liCustomer facing experience as verification lead /li liExperience in both IP and SoC level verification. /li liStrong demonstrable knowledge of verification-plan generation, coverage analysis, constrained random techniques, assertion based and formal verification techniques with System Verilog.



/li liDemonstrated experience in verification techniques for one or more of the following DSP/Processor subsystems/Formal verification /li liExpert in developing unit and SoC level test benches using UVM. Integrate the block testbench in chip-level UVM environment and verify integration. /li liExcellent debugging and analytical skills. /li liProficiency in scripting languages and utilities including Makefile, Python, TCL/tsh, Perl etc. /li li10-15 years in ASIC design verification. /li /ul h3Additional Preferred Qualifications /h3 ul liExperience with HW emulation or FPGA prototyping /li liLow power methodologies , e.g. UPF /li liExperience in behavioural modelling of analogue circuits /li liExperience in verifying processor based designs /li liKnowledge of interface protocols e.g. AHB/APB/AXI/I2C/SPMI /li /ul pFor positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. /p pAnalog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. /p pJob Req Type: Experienced /p pRequired Travel: Yes, 10% of the time /p pShift Type: 1st Shift/Days /p /p #J-18808-Ljbffr

📌 Principal Engineer, Design Verification (Valencia)
🏢 Analog Devices
📍 Valencia