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LOCATION: Barcelona, Spain

SALARY: Negotiable

DURATION: Permanent

We are looking for a Senior Digital Design Engineer to design and develop high-performance memory subsystems for modern SoCs. You will work within the Memory Design Team and collaborate closely with other engineers to create efficient and robust memory architectures.

Responsibilities:

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- Define, design, and implement memory controllers and subsystems (DDR, HBM)

- Develop and verify RTL (Verilog or VHDL) for memory blocks

- Work with timing constraints and perform block-level testing

- Integrate memory IPs into SoC environments

- Collaborate with cross‑functional teams to ensure coherency and high‑performance operation

Required:

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- 8+ years of industrial experience in digital design

- Strong knowledge of DDR or HBM memories

- Proven experience designing or integrating memory controllers

- Hands‑on experience with AXI protocol

- Proficiency in RTL design (Verilog or VHDL)

- Experience with timing constraints and basic block‑level testing

- Master’s degree or PhD

- Experience with version control (git, svn)

- Knowledge of coherency concepts and protocols

Seniority level

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- Mid‑Senior level

Employment type

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- Full‑time

Job function

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- Engineering and Design

- Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing

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📌 Senior Digital Design Engineer (Barcelona)
🏢 Beagle
📍 Barcelona