Experteer Overview
Siga leyendo para descubrir lo que necesitará para tener éxito en este puesto, incluyendo habilidades, cualificaciones y experiencia.
In this role you will drive RTL design from architecture to tape-out, owning feasibility studies and system definitions. You’ll collaborate with functional leads and backend teams to meet performance, power, and area goals, while developing flows and tools to support complex designs. You will work across Synthesis, STA, PD, and DFT groups to ensure robust, scalable RTL solutions. This is a hands-on, impact-focused position in a globally distributed engineering environment.
Compensaciones / Beneficios
• Own feasibility studies for system architecture, requirements, and external interfaces
• Develop microarchitecture and logic design with functional leads to deliver design from architecture to tape-out
• Perform RTL coding, lint checks, CDC tests, and create timing constraint files
• Collaborate with Synthesis, STA, PD, and DFT teams to meet functional, performance,



power, and area goals
• Develop design flows and tools to support design activities
Responsabilidades
• 8+ years of experience in VLSI design
• Bachelor of Science in Electrical/Computer Engineering
• Strong Verilog/SystemVerilog or VHDL skills
• Experience in defining microarchitecture and design of complex design units
• SoC design experience
• Proficiency with backend xqbhyrx tools (synthesis and STA)
• Familiarity with CPU instruction sets (ARM, RISC-V, or x86)
• Proficiency in scripting (Perl/C/Python)
• Verifications methodologies understanding
• Good communication and interpersonal skills
Requisitos principales
• adaptable working hours
• professional development opportunities
• training programs
• medical services
• Eye glasses coverage
• Employee Share Option Plan

📌 SENIOR RTL ENGINEER (Madrid)
🏢 Capgemini
📍 Madrid