31 jul
|
Gmv Spain
|
Madrid
GMV Spain is expanding its GNSS‑User Segment Navigation team to migrate an architecture from Xilinx MPSo C/FPGA to an ASIC solution. The role emphasizes RTL development, IP integration, and extensive ASIC flow activities in a cutting-edge hardware environment. We value candidates with hands-on experience in digital hardware programming, System Verilog-based verification, and familiarity with industry tools (Synopsys, Cadence, Vivado). Hybrid working model and relocation support offered. #J-18808-Ljbffr
📌 Embedded Rtl Engineer – Asic/Fpga Innovation (Madrid)
🏢 Gmv Spain
📍 Madrid