30 jul
|
Gmv Spain
|
España
GMV Spain is expanding its GNSS‑User Segment Navigation team to migrate an architecture from Xilinx MPSoC/FPGA to an ASIC solution.
The role emphasizes RTL development, IP integration, and extensive ASIC flow activities in a cutting-edge hardware environment.
We value candidates with hands-on experience in digital hardware programming, System
Verilog-based verification, and familiarity with industry tools (Synopsys, Cadence, Vivado).
Hybrid working model and relocation support offered. #J-18808-Ljbffr
📌 Embedded RTL Engineer – ASIC/FPGA Innovation (España)
🏢 Gmv Spain
📍 España