30 jul
|
Aion Silicon
|
Madrid
30 jul
Aion Silicon
Madrid
Aion Silicon is seeking a Principal Physical Design Engineer to lead full-chip implementation of complex SoCs/ASICs. You will own the complete flow from RTL handoff to GDSII, collaborating with RTL, STA, DFT, packaging and foundry partners globally.
The role requires 10+ years in physical design, leadership experience, and strong skills in 7nm/5nm nodes, with a track record of successful tape-outs and impactful stakeholder engagement.
📌 Lead Full-Chip Physical Design Architect (Madrid)
🏢 Aion Silicon
📍 Madrid